Multi-core Processor based System Architecture
On-chip computing power of micro processor technology and processor memory speed gap affects the performance of a system. The emergence of multi-core chips adds however an extra dimension to this problem, concurrent and competing access to the specific resource. This problem can not be resolved in hardware alone; modification in programming applications is also required.
The course discusses and investigate the following Multi Processors problems
Access a shared memory location concurrently without a major impact on performance.
Prioritize and administer parallel and competing requests to different locations in the memory.
Provide guarantee integrity and consistency over time of data logically belonging to different cores; in general.
Exploit a specific resource (memory bandwidth and on-chip memory) that just got a lot scarcer.
The course delivers the architecture of a processor based system and use a uni and multi-core microprocessor-based system.
It covers the application and design of the ARM processor-based system, that includes processing system hardware details and programming using assembly, Sequential/Parallel C/C++ and Python languages.
UCERD Rawalpindi
Supercomputing Center
UCERD Murree
Dr. Tassadaq Hussain.
He is a permanent faculty member at, Riphah International University.
He did his Ph.D. from Barcelona-tech Spain, in collaboration with Barcelona Supercomputing Center and Microsoft Research Center.
He is a member of HiPEAC: European Network on High Performance and Embedded Architecture and Compilation, Barcelona Supercomputing Center and Microsoft ResearchCentre Spain.
Until January 2018, he had more than 14 years of industrial experience including, Barcelona Supercomputing Centre Spain, Infineon technology France, Microsoft Research Cambridge, PLDA Italia, IBM Zurich Switzerland, and REPSOL Spain. He has published more than 50 international publications and filed 5 patents.
Tassadaq's main research lines are Machine Learning, Parallel Programming, Heterogeneous Multi-core Architectures, Single board Computers, Embedded Computer Vision, Runtime Resource Aware Architectures, Software Defined Radio and Supercomputing for Artificial Intelligence and Scientific Computing.
www.tassadaq.ucerd.com
He is a permanent faculty member at, Riphah International University.
He did his Ph.D. from Barcelona-tech Spain, in collaboration with Barcelona Supercomputing Center and Microsoft Research Center.
He is a member of HiPEAC: European Network on High Performance and Embedded Architecture and Compilation, Barcelona Supercomputing Center and Microsoft ResearchCentre Spain.
Until January 2018, he had more than 14 years of industrial experience including, Barcelona Supercomputing Centre Spain, Infineon technology France, Microsoft Research Cambridge, PLDA Italia, IBM Zurich Switzerland, and REPSOL Spain. He has published more than 50 international publications and filed 5 patents.
Tassadaq's main research lines are Machine Learning, Parallel Programming, Heterogeneous Multi-core Architectures, Single board Computers, Embedded Computer Vision, Runtime Resource Aware Architectures, Software Defined Radio and Supercomputing for Artificial Intelligence and Scientific Computing.
www.tassadaq.ucerd.com
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Unal Center of Educaiton Research & Development
Unal Center of Educaiton Research & Development
