Field Programable Gate Arrays
FPGAs typically run at much slower clock speeds than the latest CPUs, yet they can more than make up for this with their superior memory bandwidth, high degree of parallelization, and the customization that is possible. There is currently a tremendous amount of attention in FPGAs.
If we compare the cost of creating an FPGA design, it is much lower than that for an ASIC or ASSP. At the same time, implementing design changes is much easier in FPGAs and the time-to-market for such designs is much faster.
Although ASICs offer the ultimate in size (number of transistors), complexity, and performance; designing and building one is an extremely time-consuming and expensive process, with the added disadvantage that the final design is “frozen in silicon” and cannot be modified without creating a new version of the device.
FPGAs are often used to prototype ASIC designs or to provide a hardware platform on which to verify the physical implementation of new algorithms. However, their low development cost and short time-to-market mean that they are increasingly finding their way into final products.
Reconfigurable computing:
This refers to exploiting the inherent parallelism and reconfigurability provided by FPGAs to “hardware accelerates” software algorithms. By adding reconfigurable computing capability FPGA technology is creating big threat to four major market segments: ASIC and custom silicon, DSP, embedded microcontroller applications, and physical layer communication chips.
FPGA as Hardware Accelerators for HPC systems:
It is difficult for general-purpose CPUs or specialized processor solutions such as graphics processing units (GPUs) or network processors to provide a best possible solution for the broad spectrum of HPC applications. The FPGA, however, is a re-configurable engine. It can be optimized under software control to meet the particular requirements of each HPC application. This allows one hardware solution to address many HPC applications with equal efficiency. By exploiting all three levels of parallelism, an FPGA operating at 200 MHz can outperform a 3 GHz processor by an order of magnitude or more, while requiring only a quarter of the power.
System on Chip design:
By the early-2000s, high-performance FPGAs containing millions of gates had become available. Some of these devices feature embedded microprocessor cores, high-speed input/out-put (I/O) interfaces, and the like. The end result is that today’s FPGAs can be used to implement just about anything, including communications devices and software-defined radios; radar, image, and other digital signal processing (DSP) applications; all the way up to system-on-chip (SoC) components that contain both hardware and software elements.
Unal Color of Education Research & Development
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